NodeLoop

I²S & TDM Clock Calculator and Validator

Determine the correct Bit Clock (BCLK), Word Clock (LRCK/WS), and Master Clock (MCLK) frequencies for your I²S or TDM audio interface. This tool helps you verify clock ratios and settings critical for configuring microcontrollers, audio CODECs, DACs, ADCs, and other digital audio components.

Audio Configuration

Standard I²S is 2 channels. Use >2 for TDM configurations.

Master Clock (MCLK) Configuration

e.g., 64, 128, 256, 384, 512.

Calculated Clock Values

Enter your audio configuration and click "Calculate & Validate" to see the results.

Validation & Notes

Validation messages and important considerations will appear here.

About this I²S/TDM Clock Calculator

This tool is designed to simplify the process of determining and verifying the clock signals required for Inter-IC Sound (I²S) and Time Division Multiplexing (TDM) audio interfaces. Properly configured clocks are essential for error-free digital audio data transfer between components like microcontrollers (MCUs), Digital-to-Analog Converters (DACs), Analog-to-Digital Converters (ADCs), and audio CODECs.

How to Use:

  1. Sampling Frequency ($F_s$): Select or enter the desired audio sampling rate (e.g., 44.1 kHz, 48 kHz). This is the rate at which audio samples are processed.
  2. Number of Channels: Specify the total number of audio channels. For standard stereo I²S, this is 2. For TDM, it can be higher (e.g., 4, 8, 16).
  3. Actual Bit Depth: Choose the true resolution of your audio data per channel (e.g., 16-bit, 24-bit).
  4. Slot Size: Define the number of BCLK cycles allocated for each channel's data within an LRCK period. This must be greater than or equal to the Actual Bit Depth. Common values are 16, 24, 32, or 64 bits.
  5. MCLK Configuration:
    • Choose to define MCLK based on its ratio to $F_s$ (e.g., 256 × $F_s$). This is common as many audio ICs require a specific MCLK/$F_s$ ratio.
    • Alternatively, input the MCLK frequency directly if it's provided by a fixed oscillator.
  6. Click "Calculate & Validate".

The tool will then display the calculated frequencies for LRCK (Word Clock, equivalent to $F_s$), BCLK (Bit Clock), and MCLK. It will also provide validation notes regarding common requirements, such as integer relationships between clocks and ensuring the slot size accommodates the bit depth.

Key Outputs & Validations:

  • LRCK/WS Frequency: Always equal to $F_s$. Defines the rate of audio sample words.
  • BCLK Frequency: Calculated as $F_s \times \text{Number of Channels} \times \text{Slot Size}$. Each pulse synchronizes one bit of data.
  • MCLK Frequency: Either derived from the MCLK/$F_s$ ratio or taken from your direct input. Crucial for the internal operation of many audio ICs.
  • MCLK/$F_s$ Ratio: Verifies if this is an integer, often a requirement.
  • MCLK/BCLK Ratio: Checks if this is an integer, which can be important for some device synchronizations.
  • Frame Size: Total BCLK cycles per LRCK period ($(\text{Number of Channels} \times \text{Slot Size})$).
  • Slot Size vs. Bit Depth: Ensures the allocated slot is sufficient for the audio data.

Always consult the datasheets for your specific audio ICs, as they will detail the exact clocking requirements, supported formats, and necessary ratios. This tool provides a general-purpose calculation and validation aid. For an in-depth understanding of I²S, refer to our Comprehensive I²S Guide.